Synaptics and Google are introducing a new class of microcontroller, the xMCU. The first family, Astra SR200, pushes MCUs into application-processor territory: heterogeneous compute, a Google Coral NPU, and integrated high-bandwidth custom DRAM that can scale to hundreds of megabytes – all on a single chip.
Architecture and AI capabilities
At the heart of the family is the Synaptics Torq AI engine with an integrated Coral NPU, tuned for low‑latency, high‑efficiency CNN, transformer, and fully connected networks. An open‑source MLIR/IREE compiler replaces proprietary vendor toolchains and supports standard ML frameworks and formats, extending Coral’s Edge AI heritage into ultra‑low‑power, always‑on IoT.
Key architectural elements:
- High‑performance core up to 800 MHz for control, multimedia and burst compute
- Efficiency core for always‑on sensor fusion, connectivity and low‑power inference
- Optional Cadence Tensilica HiFi 5 DSP for audio and acoustic ML
- Always‑on domain for voice activity detection, timekeeping and wake‑up
Memory combines up to 8 MB SRAM with extensible, high‑bandwidth custom DRAM that scales with model size. This DRAM is designed to meet Edge AI latency and retention needs at around one‑third the power of typical system DRAM, eliminating external memory in most designs.
Product lines, I/O and use cases
The Astra SR200 family launches with three pin‑compatible lines:
- SR210: ~200 GOPS for power‑optimised, always‑on voice and sensing
- SR230: ~300 GOPS adding vision, display and optional audio for mainstream multimodal devices
- SR250: ~400 GOPS with dual vision and display paths for premium, demanding edge applications
All share the industry’s first pairing of Arm Cortex‑M85 and Cortex‑M52, integrated vision and audio, plus a multi‑layered security engine targeting PSA Level 3 and CC EAL4+ (hardware isolation, crypto acceleration, anti‑tamper, secure boot, lifecycle management).
Peripherals include:
- USB 2.0, UART, SPI, I2C, I3C, PWM and extensive low‑power GPIO
- High‑speed octal SPI, SDIO and eMMC storage interfaces
- Industrial variants with 1 Gb Ethernet (IEEE 1588 TSN) and dual CAN‑FD for deterministic networking and robotics
The platform supports Zephyr RTOS and the open‑source Torq NPU compiler. For embedded.az readers, this effectively brings Linux‑class multimodal AI workloads into an MCU form factor, suitable for wearables, smart cameras, advanced sensors and industrial Edge/Physical AI systems.
Source: Electronics Weekly
