ARM Cortex‑A: the microprocessor that reinvented mobile computing

When you boot an Arduino, you usually touch the Cortex‑M world. But when you unlock your smartphone, start a browser on a Raspberry Pi, or bring up Linux on an industrial HMI, there’s a very high chance a Cortex‑A core is doing the heavy lifting.

This is the biography of the CPU family that made “real” computing possible in your pocket.

#Before Cortex‑A: ARM grows up in mobile

ARM started as a lean RISC architecture for low‑power systems, long before phones became smart. In the 1990s and early 2000s, ARM7, ARM9 and ARM11 cores powered feature phones, PDAs and early embedded Linux boards.

But around 2005 the requirements exploded:

• full web browsers instead of WAP;
• MP3 players, video playback, 3D games;
• heavier OS kernels: Linux, Android, Windows CE;
• larger DRAM and complex virtual memory management.

ARM needed an application‑class CPU with:

• a full MMU (not just MPU);
• high IPC pipelines and higher clocks;
• SIMD for multimedia (audio, video, graphics);
• still very low power for battery‑powered devices.

The answer was the ARMv7‑A architecture and its first star: Cortex‑A8.

#Cortex‑A8 and A9: the first smartphone workhorses

Cortex‑A8 was announced in 2005 and quickly became the “Pentium” moment for ARM in mobile phones.

Key specs in context:

• Architecture: ARMv7‑A, 32‑bit
• Pipeline: deeply pipelined, dual‑issue, superscalar
• Clock: typically 600 MHz to 1 GHz in commercial SoCs
• Features: full MMU, VFPv3 FPU, NEON SIMD engine
• Process nodes: down to 65 nm / 45 nm in mass‑market chips

It powered SoCs like:

• TI OMAP3 – used in early Android phones and the Nokia N900;
• Samsung S5PC110 “Hummingbird” – original Galaxy S;
• Apple A4 – powering iPhone 4, first iPad, iPod touch 4G.

For many users this was the first time a phone could browse the web “like a PC”, play smooth videos, and run real multitasking.

Then came Cortex‑A9, which fixed the missing piece: out‑of‑order execution and easy multicore scaling.

Typical Cortex‑A9 SoCs offered:

• 2–4 cores @ 1–1.5 GHz;
• out‑of‑order pipelines with higher IPC;
• NEON SIMD and VFPv3/v4;
• 40 nm and later 28 nm nodes.

Examples:

• NVIDIA Tegra 2/3 – early Android tablets, mobile gaming devices;
• Samsung Exynos 4 – Galaxy S II, some Galaxy Note models;
• Xilinx Zynq‑7000 – dual‑core A9 tightly coupled with FPGA fabric.

For embedded developers, Zynq was a game changer: real‑time logic in FPGA plus a full Linux‑capable Cortex‑A9 on one chip.

#64‑bit era: ARMv8‑A, Cortex‑A53/A57 and beyond

By 2011, mobile and server markets were asking for more memory and performance. ARM introduced ARMv8‑A, its first mainstream 64‑bit architecture.

Two early cores defined the new generation:

• Cortex‑A53 – small, efficient, 64‑bit, in‑order; ideal for low‑power and as the “little” side of big.LITTLE;
• Cortex‑A57 – high‑performance, out‑of‑order; used as the “big” cores.

SoCs combined them:

• Exynos 5433/7420 – 4× A57 + 4× A53 on 20 nm / 14 nm;
• many HiSilicon Kirin and MediaTek chips with similar patterns.

Process technology moved from 28 nm planar down to 20 nm and then 16/14 nm FinFET, with transistor counts in the hundreds of millions per SoC. Yet ARM’s selling point remained performance per watt, not raw GHz.

On the maker side, this era gave us:

• Raspberry Pi 3 – quad‑core Cortex‑A53 @ 1.2 GHz;
• Raspberry Pi 4 – quad‑core Cortex‑A72 @ 1.5 GHz;
• newer Zynq UltraScale+ – quad‑core Cortex‑A53 plus advanced FPGA.

Now a credit‑card‑sized board could run desktop‑class Linux, full Python stacks, browsers, and even lightweight containers.

#How Cortex‑A changed embedded design

For embedded and robotics engineers, Cortex‑A did more than speed up phones:

1. Linux everywhere – Full MMU and strong MMU/TLB designs meant running mainline Linux, Android, and BSD on small boards with 256 MB–8 GB of RAM.
2. Rich stacks on the edge – Qt, ROS, OpenCV, TensorFlow Lite, Node.js all became realistic on fanless devices.
3. Hybrid systems – Pair a Cortex‑A SoC with Cortex‑M microcontrollers or FPGA fabric to mix hard real‑time with high‑level logic.
4. Cheap dev boards – Raspberry Pi, BeagleBone, Orange Pi, NanoPi brought “application processors” into hobby labs.

Instead of writing everything in bare‑metal C, embedded teams can now:

• run Linux + firmware side by side;
• offload UI, networking, and high‑level logic to a Cortex‑A;
• keep time‑critical loops on a Cortex‑M or in FPGA.

#Today’s landscape: custom cores but the same DNA

Modern flagship phones use custom cores like Apple’s M‑series / A‑series, Qualcomm Kryo, or Samsung Exynos custom cores. Internally, most still implement the ARMv8‑A or ARMv9‑A instruction sets and build on concepts proven by the Cortex‑A line: deep pipelines, aggressive branch prediction, wide out‑of‑order execution, and powerful SIMD.

At the same time, off‑the‑shelf Cortex‑A cores such as Cortex‑A55, A76, A78, X‑series drive mid‑range phones, Chromebooks, automotive infotainment, industrial HMIs, and IoT gateways. With integrated NPUs and GPUs, a modern Cortex‑A SoC can run:

• camera processing and basic ML inference on the edge;
• full Linux with secure boot and virtualization;
• complex GUIs with hardware‑accelerated graphics.

For electronics enthusiasts, the legacy is simple: whenever you SSH into a Raspberry Pi, run ROS on a robot, or bring up Yocto Linux on a custom carrier board, you are standing on the shoulders of ARM Cortex‑A – the CPU family that proved low‑power chips could deliver full‑scale computing.